1. Field of the Invention
The present invention relates to a liquid crystal display device, and more particularly, to a liquid crystal display panel, a liquid crystal display device having the same, and a driving method thereof.
2. Discussion of the Related Art
A liquid crystal display (LCD) device displays an image by controlling light transmittance of liquid crystal cells according to an image signal. The LCD device may be driven using an inversion scheme in which data applied to a liquid crystal cell is periodically inverted to reduce image flickering and the generation of an after-image. The inversion schemes includes a line inversion scheme in which the polarity of data for a vertical line is periodically inverted, a column inversion scheme in which the polarity of data for a horizontal line is inverted, and a dot inversion scheme in which the polarity of data is inverted for adjacent liquid crystal cells.
FIG. 1 is a schematic circuit diagram showing a liquid crystal display panel of a related art LCD device. The related art liquid crystal display panel is constructed by injecting liquid crystals between upper and lower glass substrates. As shown in FIG. 1, a plurality of gate lines Gn−1, Gn and Gn+1 are arranged in a first direction on the lower glass substrate and a plurality of data lines Dm−1, Dm and Dm+1 are arranged in a second direction. Pixel regions P are defined by crossings of the gate lines Gn−1, Gn and Gn+1, and the data lines Dm−1, Dm and Dm+1. A thin film transistor T and a pixel electrode are formed in each pixel region P. Red (R), green (G) and blue (B) color filters and a common electrode are formed on the upper glass substrate. In the illustrated LCD device of the related art, a liquid crystal cell Clc is formed between a pixel electrode on the lower glass substrate and the common electrode of the upper glass substrate. The liquid crystal cell Clc is driven by a data voltage supplied to the pixel electrode and a common voltage supplied to the common electrode.
A storage capacitor Cst (not shown) is formed at the overlap between the pixel electrode and a gate line. The storage capacitor Cst maintains a data voltage supplied to the pixel electrode for a first horizontal period H.
A scan signal is sequentially supplied to the plurality of gate lines Gn−1, Gn and Gn+1, to turn on the thin film transistors connected to the gate lines Gn−1, Gn and Gn+1. While the thin film transistors are turned on, a data voltage supplied to the plurality of data lines Dm−1, Dm and Dm+1 is applied to the pixel electrodes via the thin film transistors T. Accordingly, the data voltage supplied to the pixel electrodes of the lower glass substrate and the common voltage supplied to the common electrode of the upper glass substrate are applied to the liquid crystal cells Clc to display an image.
Referring to FIG. 2, when a gate high voltage Vgh is switched to a gate low voltage Vgl, a kickback voltage ΔVp as shown in Equation 1 below is generated by parasitic capacitance Cgd of the thin film transistor T. The kickback voltage ΔVp is charged into the liquid crystal cell Clc. This kickback voltage ΔVp causes a continuous voltage drop in the inversion type, regardless of whether the polarity of the data voltage is positive or negative. The kickback voltage ΔVp may be calculated using Equation 1.
                              Δ          ⁢                                          ⁢          Vp                =                              Cgd                          Cgd              +              Cst              +              Clc                                ⁢                      (                          Vgh              -              Vgl                        )                                              (                  Equation          ⁢                                          ⁢          1                )            
In Equation 1, ΔVp denotes a kickback voltage, Cgd denotes capacitance between a gate electrode and a drain electrode of the thin film transistor T, and Cst denotes storage capacitor. As may be appreciated from Equation 1, ΔVp varies directly with the parasitic capacitance Cgd of the thin film transistor.
For a given gray scale value, the charged amount for positive polarity data voltage dropped by the kickback voltage ΔVp becomes different from that of the negative polarity data voltage dropped by the kickback voltage ΔVp referenced to a common voltage Vcom, resulting in flickering as polarity is reversed. Depending on the inversion scheme used, the flickering may occur between dots, lines, or frames.
Further, although the LCD device is driven by the inversion scheme, an afterimage is still generated.
Additionally, in the related LCD device, to obtain high brightness, a data voltage is raised with respect to the common voltage Vcom to increase the electric potential difference therebetween. Since the data voltage is raised to obtain the high brightness, power consumption is disadvantageously increased.
In practice, different data voltages are supplied to respective liquid crystal cells Clc. Differing kickback voltages are generated by the different data voltages because the parasitic capacitance Cgd is a function of the data voltage. For this reason, kick back voltage cannot be effectively compensated for by adjusting the common voltage Vcom.